Name: Toward 5g Software Defined Radio Receiver Front-Ends (Springerbriefs in Electrical and Computer Engineering) (en Inglés)
Price: 107.50 USD
Availability: InStock
Author: Silvian Spiridon
ISBN: 9783319327587

portada Toward 5g Software Defined Radio Receiver Front-Ends (Springerbriefs in Electrical and Computer Engineering) (en Inglés)

Formato

Libro Físico

Editorial

Springer

Autor

Silvian Spiridon

Año

2016

Idioma

Inglés

N° páginas

116

Encuadernación

Tapa Blanda

ISBN13

9783319327587

N° edición

Categorías

Electrónica: circuitos y componentes

Toward 5g Software Defined Radio Receiver Front-Ends (Springerbriefs in Electrical and Computer Engineering) (en Inglés)

Silvian Spiridon (Autor) · Springer · Tapa Blanda

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Reseña del libro "Toward 5g Software Defined Radio Receiver Front-Ends (Springerbriefs in Electrical and Computer Engineering) (en Inglés)"

This book introduces a new intuitive design methodology for the optimal design path for next-generation software defined radio front-ends (SDRXs). The methodology described empowers designers to "attack" the multi-standard environment in a parallel way rather than serially, providing a critical tool for any design methodology targeting 5G circuits and systems. Throughout the book the SDRX design follows the key wireless standards of the moment (i.e., GSM, WCDMA, LTE, Bluetooth, WLAN), since a receiver compatible with these standards is the most likely candidate for the first design iteration in a 5G deployment. The author explains the fundamental choice the designer has to make regarding the optimal channel selection: how much of the blockers/interferers will be filtered in the analog domain and how much will remain to be filtered in the digital domain. The system-level analysis the author describes entails the direct sampling architecture is treated as a particular case of mixer-based direct conversion architecture. This allows readers give a power consumption budget to determine how much filtering is required on the receive path, by considering the ADC performance characteristics and the corresponding blocker diagram.